Semiconductor devices are commonly found in modern electronic products. Semiconductor devices vary in the number and density of electrical components. Discrete semiconductor devices generally contain one type of electrical component, e.g., light emitting diode (LED), small signal transistor, resistor, capacitor, inductor, and power metal-oxide-semiconductor field-effect transistor (MOSFET). Integrated semiconductor devices typically contain hundreds to millions of electrical components. Examples of integrated semiconductor devices include microcontrollers, microprocessors, and various signal processing circuits.
Semiconductor devices perform a wide range of functions such as signal processing, high-speed calculations, transmitting and receiving electromagnetic signals, controlling electronic devices, transforming sunlight to electricity, and creating visual images for television displays. Semiconductor devices are found in the fields of entertainment, communications, power conversion, networks, computers, and consumer products. Semiconductor devices are also found in military applications, aviation, automotive, industrial controllers, and office equipment.
FIG. 1 illustrates electronic device 50 having a chip carrier substrate or printed circuit board (PCB) 52 with a plurality of semiconductor packages mounted on a surface of the PCB. Electronic device 50 can have one type of semiconductor package, or multiple types of semiconductor packages, depending on the application. Different types of semiconductor packages are shown in FIG. 1 for purposes of illustration.
Electronic device 50 can be a stand-alone system that uses the semiconductor packages to perform one or more electrical functions. Alternatively, electronic device 50 can be a subcomponent of a larger system. For example, electronic device 50 can be part of a tablet, cellular phone, digital camera, television, power supply, or other electronic device. Electronic device 50 can also be a graphics card, network interface card, or other expansion card that is inserted into a personal computer. The semiconductor packages can include microprocessors, memories, application specific integrated circuits (ASIC), programmable logic circuits, analog circuits, radio frequency (RF) circuits, discrete devices, or other semiconductor die or electrical components.
In FIG. 1, PCB 52 provides a general substrate for structural support and electrical interconnect of the semiconductor packages mounted on the PCB. Conductive signal traces 54 are formed over a surface or within layers of PCB 52 using evaporation, electrolytic plating, electroless plating, screen printing, or another suitable metal deposition process. Signal traces 54 provide for electrical communication between each of the semiconductor packages, mounted components, and other external system components. Traces 54 also provide power and ground connections to each of the semiconductor packages. A clock signal is transmitted between semiconductor packages via traces 54 in some embodiments.
For the purpose of illustration, several types of first level packaging, including bond wire package 56 and flipchip 58, are shown on PCB 52. Additionally, several types of second level packaging, including ball grid array (BGA) 60, bump chip carrier (BCC) 62, land grid array (LGA) 66, multi-chip module (MCM) 68, quad flat non-leaded package (QFN) 70, quad flat package 72, embedded wafer level ball grid array (eWLB) 74, and wafer level chip scale package (WLCSP) 76 are shown mounted on PCB 52. Depending upon the system requirements, any combination of semiconductor packages, configured with any combination of first and second level packaging styles, as well as other electronic components, can be connected to PCB 52.
A manufacturer of electronic device 50 provides for a power signal to be connected to the electronic device, which is used to power the semiconductor packages and other devices disposed on PCB 52. In many cases, the provided power signal is at a different voltage potential than the voltage required to operate the individual semiconductor devices. The manufacturer will generally provide a power converter circuit on PCB 52 to generate a steady direct current (DC) voltage signal at a voltage potential usable by the individual semiconductor packages. One topology that is commonly used for medium and high power converters is the series LLC resonant mode converter, which is a type of switch-mode power supply (SMPS).
A circuit diagram for one exemplary embodiment of an LLC resonant mode converter as SMPS 100 is illustrated in FIG. 2a. SMPS 100 has a primary side 102 and a secondary side 104. Primary side 102 includes a voltage source 106, which is a DC voltage source. In one embodiment, voltage source 106 is an AC main line distributed by a power company or municipality to a power outlet at a user's home or office that is rectified to DC, e.g., by a diode bridge. Voltage source 106 is coupled between ground node 108 and input voltage (VIN) node 110. Primary side 102 also has upper or high-side MOSFET 112 with a drain terminal coupled to VIN node 110, a gate terminal 114, and a source terminal coupled to lower or low-side MOSFET 116 at half-bridge (HB) node 122. Low-side MOSFET 116 includes a drain terminal coupled to the source terminal of high-side MOSFET 112 at HB node 122, a gate terminal 118, and a source terminal coupled to ground node 108. MOSFET 112 is referred to as a high-side MOSFET because MOSFET 112 couples HB node 122 to a higher voltage potential at VIN node 110 when MOSFET 112 is turned on. MOSFET 116 is referred to as a low-side MOSFET because MOSFET 116 couples HB node 122 to a lower, or ground, voltage potential at circuit node 108 when MOSFET 116 is turned on.
Primary side 102 of SMPS 100 includes resonant inductor 128, resonant capacitor 136, and the primary side of transformer 130, including primary winding 132 and magnetizing inductance 134, coupled in series between HB node 122 and ground node 108. Resonant inductor 128, primary winding 132, magnetizing inductance 134, and resonant capacitor 136 form an LLC tank for SMPS 100. Controller 120 drives the LLC resonant tank formed by resonant inductor 128, primary winding 132, magnetizing inductance 134, and resonant capacitor 136 by turning MOSFETs 112 and 116 on and off alternatively using control signals provided to gates 114 and 118. Controller 120 turns high-side MOSFET 112 on by applying a positive voltage at gate terminal 114, and turns high-side MOSFET 112 off by applying a ground voltage potential to gate terminal 114. Controller 120 turns low-side MOSFET 116 on by applying a positive voltage at gate terminal 118, and turns low-side MOSFET 116 off by applying a ground voltage potential to gate terminal 118.
MOSFETs 112 and 116 are n-channel MOSFETs, indicating that negative carriers, or electrons, are the majority carrier for electric current through the MOSFETs. In other embodiments, p-channel MOSFETs are used that have positive electron holes as the majority carrier. An n-channel MOSFET provides low electrical resistance between a drain terminal and a source terminal of the n-channel MOSFET when a voltage potential of a gate terminal is sufficiently high. With the gate of the MOSFET at ground potential, or at least below a threshold, a larger electrical resistance is exhibited between the drain and source of the MOSFET.
In the ideal case, an n-channel MOSFET exhibits zero resistance when its gate has a positive voltage potential, and exhibits infinite resistance when its gate is at ground potential. MOSFETs 112 and 116 operate as switches which are opened and closed by control signals from controller 120 coupled to the MOSFETs' respective gates. A switch, e.g., MOSFETs 112 and 116, being closed is also referred to as the switch being “on,” because electric current is able to flow between terminals of the switch. An open switch is referred to as being “off” because current does not flow significantly between terminals of the switch. While the switches of SMPS 100 are illustrated as MOSFETs, other types of electronically controlled switches, e.g., bipolar-junction transistors (BJTs), are used in other embodiments. MOSFETs include source and drain terminals, which are conduction terminals, and a gate terminal as a control terminal. BJTs include emitter and collector terminals, which are conduction terminals, and a base terminal as a control terminal.
When high-side MOSFET 112 is on and low-side MOSFET 116 is off, HB node 122 is coupled to voltage source 106 at VIN node 110 through high-side MOSFET 112. When low-side MOSFET 116 is on and high-side MOSFET 112 is off, HB node 122 is coupled to ground node 108 through low-side MOSFET 116. Controller 120 alternates switching of MOSFETs 112 and 116, which causes the voltage potential at HB node 122 to alternate between the voltage potentials of voltage source 106 and ground node 108. The pulsating voltage potential at HB node 122 causes resonant inductor 128, primary winding 132, magnetizing inductance 134, and resonant capacitor 136 to resonate.
Magnetizing inductance 134 is not an actual physical inductor, but is used in analysis to represent a portion of current through transformer 130 that is used to magnetize core 137. Energy is transferred from primary winding 132 to secondary winding 138 through magnetic coupling. A certain percentage of the power input to transformer 130, analyzed as the current through magnetizing inductance 134, is lost in core 137 because the core does not have a perfectly efficient magnetic response.
As HB node 122 toggles between the voltage potentials of ground node 108 and VIN node 110, power is transferred from primary winding 132 to secondary winding 138. A circuit node 152 is connected to secondary winding 138 as a center-tap. The center-tap of circuit node 152 provides a ground potential circuit node for secondary side 104. A secondary winding portion 138a is coupled between center tapped ground node 152 and diode 142, while secondary winding portion 138b is coupled between center tapped ground node 152 and diode 144. Diodes 142 and 144 rectify the current through secondary winding 138. Capacitor 146 is coupled between output voltage (VOUT) node 150 and ground node 152 to filter the output voltage to a relatively steady DC voltage.
As power is transferred from primary side 102 to secondary side 104 through transformer 130, the voltage potential at VOUT node 150 rises to charge capacitor 146 and power a load connected between VOUT node 150 and ground node 152. Feedback is provided to controller 120 from secondary side 104 via Zener diode 154, LED 156, and phototransistor 158 coupled between VOUT node 150 and feedback (FB) node 160. LED 156 and phototransistor 158 form an optocoupler to maintain galvanic isolation between primary side 102 and secondary side 104. Isolation is provided for FB node 160 with other methods in other embodiments. Once the voltage potential at VOUT node 150 rises above the Zener voltage of Zener diode 154 summed with the turn-on voltage of LED 156, current flows from VOUT node 150 to ground node 152 through Zener diode 154 and LED 156 in series. Light photons emitted by LED 156 impact phototransistor 158, which increases coupling of FB node 160 to ground node 108 through the phototransistor. Controller 120 uses FB node 160 to reduce power transfer across transformer 130 when the voltage at VOUT node 150 rises above a desired threshold.
FIG. 2b illustrates timing of voltages and currents at various circuit nodes of SMPS 100 through a full power transfer cycle. Time is illustrated on the X, or horizontal, axis, and voltage or current magnitude is illustrated on the Y, or vertical, axis. Time is not labelled in units of time, but rather to distinguish between modes of operation of SMPS 100.
Signal 164 in FIG. 2b represents a signal generated by controller 120 and routed to gate 114 of high-side MOSFET 112. Signal 164 transitions from logic zero to logic one, or from ground voltage to a positive voltage, at time zero. Signal 164 at a positive voltage turns on high-side MOSFET 112, which couples HB node 122 to voltage source 106 at VIN node 110. Signal 164 returns to a logic zero, or ground potential, at time 2.
Signal 165 in FIG. 2b represents a signal generated by controller 120 and routed to gate 118 of low-side MOSFET 116. After a dead-time period where both MOSFETs 112 and 116 are off, signal 165 transitions from a logic zero to a logic one at time 3, and returns to logic zero at time 5. Signal 165 at a positive voltage potential turns on low-side MOSFET 116, which couples HB node 122 to ground node 108.
Primary current 166 in FIG. 2b is the total current through the primary side of transformer 130, i.e., the current through magnetizing inductance 134 summed with the current through primary winding 132. Magnetizing current 167 is the current through magnetizing inductance 134 that is used to magnetize core 137 of transformer 130. Beginning at time zero, currents 166 and 167 increase from negative values to positive values due to coupling to positive voltage at VIN node 110 through high-side MOSFET 112. The arc of primary current 166 illustrates resonance between resonant capacitor 136 and resonant inductor 128. Prior to time 1, while primary current 166 is negative, the body diode of high-side MOSFET 112 conducts and allows signal 164 to turn on high-side MOSFET 112 under zero voltage switching (ZVS) conditions.
The difference between total primary current 166 and magnetizing current 167 is transferred to secondary winding 138. The reflected current in secondary winding 138 is illustrated as secondary current 168 in FIG. 2b. Secondary current 168 is determined based on a difference between primary current 166 and magnetizing current 167. The magnetizing current 167 portion of primary current 166 is used to magnetize core 137, while the remaining portion of primary current 166 is reflected as secondary current 168. Secondary current 168 is only illustrated as including positive values because negative current is rectified to positive voltage at circuit node 150 by diodes 142 and 144.
At time 2, signal 164 returns to ground voltage potential, switching off high-side MOSFET 112. Currents 166 and 167 reverse direction and the body diode of low-side MOSFET 116 conducts to ground node 108. Currents 166 and 167 fall from a positive value to a negative value due to the coupling to ground node 108, mirroring the currents between time 0 and time 2. Signal 165 turns on low-side MOSFET 116 at time 3, while primary current 166 remains positive, to achieve ZVS. Secondary current 168 includes a positive pulse between time 3 and time 5 because of rectification by diodes 142 and 144. Secondary current 168, which flows through either diode 142 or diode 144 to VOUT node 150, charges capacitor 146 and powers a load attached between VOUT node 150 and ground node 152.
Resonant mode converters, such as SMPS 100, commonly control output voltage across a varying load by modifying the switching frequency, which is referred to as frequency modulation mode. FIG. 2c illustrates SMPS 100 operating at a higher frequency to reduce output current at a lighter load. High-side MOSFET 112 is operated by control signal 174 from controller 120 to gate terminal 114, which has a shorter pulse-width than control signal 164 in FIG. 2b. Low-side MOSFET 116 is operated by control signal 175 from controller 120 to gate terminal 118, which has a shorter pulse-width than control signal 165 in FIG. 2b. The shorter on-times of MOSFETs 112 and 116 cut off primary current 176 through primary winding 132 before the primary current reaches the resonant peak seen with primary current 166 in FIG. 2b. With a lower magnitude electric current through primary winding 132, less energy is transferred from primary side 102 to secondary side 104 each SMPS 100 power cycle. Secondary current 178 in FIG. 2c illustrates the electric current through either of diodes 142 and 144 to VOUT node 150. Secondary current 178 is cut off at time 1 when control signal 174 switches off high-side MOSFET 112, and at time 3 when control signal 175 turns off low-side MOSFET 116, rather than continuing to rise as in FIG. 2b. 
FIG. 2d illustrates power transfer through transformer 130 reduced further compared to FIG. 2c by increasing switching frequency relative to FIG. 2c. Control signal 184 to high-side MOSFET 112 has a shorter pulse-width than control signal 174. Control signal 185 to low-side MOSFET 116 has a shorter pulse-width than control signal 175. Primary current 186 through primary winding 132 includes a lower magnitude because the shorter pulse-widths of control signals 184 and 185 cut off the primary current earlier in the power cycle while the primary current is increasing. The pulses of secondary current 188 are similarly shorter and peak at a lower magnitude than secondary current 178 in FIG. 2c. 
Increasing switching frequency to reduce power transfer at lighter loads is useful for a range of relatively high output currents. However, as the magnitude of electric current through primary winding 132 is reduced further, the efficiency losses due to magnetizing current through magnetizing inductance 134 constitutes a larger portion of the overall power losses of SMPS 100. With only a frequency modulation scheme, as is demonstrated in FIGS. 2b-2d, efficiency drops significantly under light loads. Plot 190 in FIG. 2e illustrates efficiency of SMPS 100 over a range of output currents in one embodiment. Plot 190 demonstrates that efficiency of SMPS 100 is relatively steady when output current remains between 5 and 20 amperes. However, plot 190 also shows that efficiency is significantly reduced as output current is reduced when output current drops below 5 amps.
One traditional solution to improving efficiency is to implement a burst or skip mode under light load conditions. Once a voltage potential of FB node 160 reaches a skip mode turn-on threshold, SMPS 100 enters skip mode. Controller 120 stops switching MOSFETs 112 and 116, and both MOSFETs remain off while skip mode is enabled. Both high-side MOSFET 112 and low-side MOSFET 116 remain off, and the voltage potential at VOUT node 150 decays. As output voltage decays, the voltage potential of FB node 160 drifts until the feedback voltage reaches a skip mode turn-off threshold, then controller 120 resumes switching MOSFETs 112 and 116.
FIG. 2f illustrates SMPS 100 entering skip mode. Control signal 195 shows the final pulse from controller 120 turning on MOSFET 116 between time 1 and time 2, just prior to entering skip mode. The pulse of control signal 195 to gate terminal 118 couples HB node 122 to ground node 108 between time 1 and time 2 in FIG. 2f. Signal 199 in FIG. 2f illustrates the voltage potential of HB node 122. SMPS 100 is in skip mode after time 2, which means that controller 120 does not turn on either of MOSFETs 112 and 116. HB node 122 floats along with resonant oscillations of primary winding 132, resonant inductor 128, and resonant capacitor 136.
Positive, or rising, transitions of HB node 122 occur at times when the voltage potential of HB node 122 moves from approximately ground potential to approximately the voltage potential of VIN node 110. Negative, or falling transitions of HB node 122 occur at times when the voltage potential of HB node 122 moves from approximately VIN 110 to approximately ground potential. The voltage swings of HB node 122 are considered rising and falling transitions between peaks and valleys even when the voltage potentials of ground node 108 and VIN node 110 are not reached.
Signal 199 diminishes over time because controller 120 does not enable high-side MOSFET 112 or low-side MOSFET 116 to input additional energy into the resonant system. When the voltage potential of FB node 160 subsequently drifts across the skip mode turn-off threshold, SMPS exits skip mode and begins switching MOSFETs 112 and 116 again. The voltage potential at HB node 122 is unknown when controller 120 begins switching MOSFETs 112 and 116 again. Controller 120 switches on low-side MOSFET 116 first and operates with a 50% duty cycle when returning from skip mode, which results in imbalanced resonant tank current, causes SMPS 100 to generate acoustic noise, and increases power losses due to hard switching.